1. Field of the Invention
This invention relates to a semiconductor chip, a semiconductor device in which a plurality of semiconductor chips on which semiconductor integrated circuits are formed are electrically connected, and relates to a method for producing a semiconductor device for interfacing the semiconductor chips with performing ESD (Electro Static Discharge) protection between the semiconductor chips.
2. Background Art
Requirement of density growth in the semiconductor industries has become strict not only in the silicon processes but also in the packaging technologies. As well as SoC (system on chip) technique of constructing a system by integrating various semiconductor integrated circuits on one chip, a so-called MCL (multi-chip logic) technique, in which a system is constructed by integrating a plurality of semiconductor integrated circuits and then the plurality of semiconductor integrated circuits are taken in one package (surrounding equipment), has been developed.
Specifically, for example, when there are two chips to be intended to be MCL (multi chip logic) constitution and there is an interfacing IO cell between the two chips, bumps are connected in the IO cell by, for example, putting a solder bump on a connective electrode in a chip A and forming a gold (Au) bump in a chip B for the two semiconductor chips and then contacting and reflowing to melt these bumps. In this case, in the contacted interfacing portions, mobility of charge between the semiconductor chips is generated in the contact of the both bumps, and therefore, it is afraid that ESD destruction is caused. Therefore, it is necessary that ESD protective devices are installed in the bumps of the IOs or of the power source.
However, for providing each of the IOs with independently sufficient ESD resistance, large-size protective devices become required. As a result, the chip sizes become large and this is a large disadvantage for the MCL constitution.
In JP-A 11-40713 (Kokai), there are disclosed an LSI package, in which a terminal array does not slant and insertability of the terminals is maintained to be good, and a packaging system thereof. In the packaging method of the LSI package, after an LSI package is inserted in to an LSI socket, first, position adjustment is performed by the longest positioning terminal, and next, a long earth terminal is connected to prevent electric break due to static electricity or the like, and next, the power is applied. Thus, the terminals are inserted into holes of the LSI sockets in order of lengths of the terminals, and last, all the terminals of the LSI package become in contact with the socket and are connected to a print substrate through the socket. In this case, the LSI socket is pin sockets that are independent for each of the pins, and for example, holes are opened on the print substrate, and the holes are subjected to through-hole plating, and then, the pin sockets are inserted thereinto and soldered.